The present invention relates to determination of overlay between structures formed in single or multiple semiconductor layers and to determination of critical dimension (CD) of semiconductor features. More particularly, it relates to metrology tools that are used to measure or determine overlay and CD.
In various manufacturing and production environments, there is a need to control alignment between various layers of samples, or within particular layers of such samples. For example, in the semiconductor manufacturing industry, electronic devices may be produced by fabricating a series of layers on a substrate, some or all of the layers including various structures. The relative position of such structures both within particular layers and with respect to structures in other layers is relevant or even critical to the performance of completed electronic devices.
The relative position of structures within such a sample is sometimes called overlay. Various technology and processes for measuring overlay have been developed and employed with varying degrees of success. More recently, various efforts have been focused on utilizing radiation scatterometry as a basis for overlay metrology. Scatterometry has also been utilized to measure critical dimensions (CDs) of a CD target.
Conventional techniques for obtaining overlay and CD include two measurement sessions: one for the CD and one for the overlay. That is, two separate measurements are required on two separate metrology tools. The wafer is typically first loaded into an overlay metrology tool to determine overlay on the wafer's overlay targets. The wafer is then unloaded from the overlay tool and loaded into a CD metrology tool to then measure CD on the wafer's CD targets. Needless to say, this bifurcated measurement process requires significant overhead and time.
Therefore, it would be beneficial to reduce the overhead for obtaining overlay and CD on a wafer or the like.